DSL and MLIR Backend
CIM-DSL frontend, AST to MLIR lowering, and pass-based ISA code generation
The low-level backend is invoked via the cim-compiler compile command. It is used directly for DSL programs and indirectly during OP-level kernel generation.
Entry Command
cim-compiler compile \
--input-file code.cim \
--output-dir build/out \
--config-file config.jsonCompilation Flow
The compile command performs the following pipeline:
Preprocess DSL Source
Remove comments and expand macros from the .cim source file
Parse to AST
Invoke ANTLR-based parser to produce ast.json
Lower to MLIR
Convert AST JSON into an MLIR module
Run Pass Pipeline and Emit ISA
Execute optimization passes and emit final_code.json
Generated output files:
| File | Description |
|---|---|
origin_code.cim | Original DSL source |
precompile.cim | Source after comment removal and macro expansion |
ast.json | Abstract syntax tree from ANTLR parser |
final_code.json | Generated ISA instructions |
DSL Grammar Coverage
The DSL grammar supports:
- Function definitions with typed parameters
- Assignments, calls,
forloops (withcarry),if/else - Slicing, scalar/vector expressions, and built-ins
- Memory/type literals required by CIM backend
See Domain Specific Language for user-facing syntax.
MLIR Pass Pipeline
The backend runs a series of MLIR optimization passes to lower the DSL program into ISA instructions. The passes handle function inlining, loop unrolling, CIM-specific dialect lowering, register allocation, and final code emission. The output is always final_code.json regardless of the internal pass ordering.
For background on the MLIR framework and pass infrastructure, see the official documentation at mlir.llvm.org/docs.
Relationship with OP-Level
During OP-level compilation, certain operators — particularly depthwise convolution and fallback convolution paths — need custom ISA code beyond basic lowering rules. In these cases, OP-level invokes this same DSL-to-ISA pipeline to compile the kernel. The resulting instruction blocks are then inserted into the global per-core ISA file alongside the instructions produced by direct lowering.
This invocation is transparent: users do not provide DSL source to OP-level. The kernel templates are generated internally, compiled through the pass pipeline above, and merged into the final output.
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